主要规格及技术指标

HE-100 Product Features

Memristor Unit Structure: 2T2R (consisting of two transistors and two resistors)

Single Array Memristor Capacity: 147,456 (144k, where 'k' denotes thousand)

Single Array Weight Matrix Size: 576×128

Maximum Number of Arrays Supported by the System: 8

In-Memory Computing Support per Row and Column: Enabled

Endurance (Number of Erase-Write Cycles): ≥10^5 (greater than or equal to one million cycles)

Gigabit Ethernet Port Support: Yes

USB Serial Port Support: Yes

Software Development Kit (SDK): Accompanying SDK that supports common neural network operators such as Convolution, Fully Connected (FC), ReLU (Rectified Linear Unit), Pooling, and more.

HE-100 产品特性
忆阻器单元结构 2T2R
单阵列忆阻器规模 147,456 (144k)
单阵列权重规模 576×128
系统最大可支持阵列个数 8
每行每列单独存内计算 支持
可擦写次数 ≥10^5
千兆网口 支持
USB 串口 支持
软件开发包 配套的软件开发包，支持常见神经网络算子，包括卷积、全连接、ReLU、Pooling 等

主要功能及特色

HE-100 is an integrated testing and development platform based on memristor in-memory computing, belonging to the Helium product series. This platform comprises both hardware and software components. The hardware is assembled from multiple circuit boards with distinct functionalities, including POWER boards, FPGA boards, and SOCKET boards. Notably, the SOCKET boards can be stacked in multiple layers according to the scale requirements of the memristor arrays. The software aspect includes a host computer application and embedded software, enabling users to control the entire system through Python-based API interfaces for functions such as memristor array functional testing and algorithm development.

The primary purpose of this system is to facilitate algorithm validation and development for in-memory computing. Researchers can input neural network structures and weights into the system through programming interfaces and perform computational inference. By analyzing the computation results, researchers can thoroughly evaluate the performance metrics of in-memory computing, including accuracy and efficiency. This, in turn, enables the formulation of new methods and ideas tailored specifically for neural network structures, training algorithms, and other aspects that are more suitable for in-memory computing systems.

HE-100 是一套基于忆阻器存算一体测试和开发平台，属于 Helium 产品系列。该平台包含硬件与软件两部分。硬件由多个不同功能的电路板组合而成，包括 POWER 板、FPGA板以及 SOCKET 板，其中 SOCKET 板可多根据忆阻器阵列的规模需要进行多层堆叠；软件包括上位机应用程序和嵌入式软件，用户可以基于 Python 的 API 接口控制整个系统，实现忆阻器阵列功能测试和算法开发等功能。
该系统主要用于存算一体计算的算法验证与开发，研究者可将神经网络结构与权重通过程序接口输入系统中并进行计算推理。通过对计算结果的分析，研究者能够对存算一体计算的精度、效率等性能指标进行充分评估，进而在神经网络结构、训练算法等方面提出更适用于基于存算一体计算系统的新方法与新思路。

主要附件及配置

无